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Technical Reports


  1. D. Shapiro, J. Parri, J.-M. Desmarais, A. Kouri, J-P. Bergeron, M. Bolic, "Soft Co-Processor Based Hardware Acceleration for Image Blending ," Computer Architecture Research Group, University of Ottawa, Ottawa, Ont., Report No. TR-2011-2 http://www.ruor.uottawa.ca/en/handle/10393/19832), March. 2011.
  2. D. Shapiro, M. Montcalm, M. Bolic, and V. Groza, "Static task scheduling for configurable multiprocessors," Computer Architecture Research Group, University of Ottawa, Ottawa, Ont., Report No. TR-2010-1 (http://hdl.handle.net/10393/12896), Jan. 2010.
  3. M. Montcalm, D. Shapiro, V. Groza, and M. Bolic, "ITS: An ILP-based combined instruction/task static scheduling algorithm," Computer Architecture Research Group, University of Ottawa, Ottawa, Ont., Report No. TR-2010-2 (http://hdl.handle.net/10393/12897), Jan. 2010.
  4. M. Branchaud, D. Shapiro, V. Thareja, S. Vijayakumar and M. Bolic, "SING: A multiprocessor system-on-chip design and system generation tool," Computer Architecture Research Group, University of Ottawa, Ottawa, Ont., Report No. TR-2010-3 (http://hdl.handle.net/10393/12898), Jan. 2009.